Plasma Reflow Technology for Wafer Level Packaging

Fonte Standard Gras
Identifiant

Unité de recherche

INNOSUISSE

Numéro de projet

9117.2;6 PFNM-NM

Titre du projet

Plasma Reflow Technology for Wafer Level Packaging

Titre du projet anglais

Plasma Reflow Technology for Wafer Level Packaging

Textes relatifs à ce projet

	Allemand	Français	Italien	Anglais
Description succincte	-	-	-
Résumé des résultats (Abstract)	-	-	-

Textes saisis

Catégorie	Texte
Description succincte (Anglais)	Plasma Reflow Technology for Wafer Level Packaging
Résumé des résultats (Abstract) (Anglais)	The objective of this project is to develop advanced process and equipment technology for Solder Reflow in Wafer Level Packaging (WLP). For the first time in the industry, dedicated plasma cleaning will be integrated with controlled thermal processing in a single chamber. The in-situ plasma clean removes surface oxides from bump structures in an environmentally benign manner so that the reflow process can be performed without the use of any solder flux. Valuable scientific and technological knowledge of the basic nature of the processes involved in the integrated Plasma Clean and Solder Reflow will be generated in the course of the project. The novel process technology will be made available on a first demonstration chamber. Commercialization of the Plasma Reflow technology in the Semiconductor and Microsystems industry is intended by UCP upon completion of the project.

Catégorie

Texte

Description succincte
(Anglais)

Plasma Reflow Technology for Wafer Level Packaging

Résumé des résultats (Abstract)
(Anglais)

The objective of this project is to develop advanced process and equipment technology for Solder Reflow in Wafer Level Packaging (WLP). For the first time in the industry, dedicated plasma cleaning will be integrated with controlled thermal processing in a single chamber. The in-situ plasma clean removes surface oxides from bump structures in an environmentally benign manner so that the reflow process can be performed without the use of any solder flux. Valuable scientific and technological knowledge of the basic nature of the processes involved in the integrated Plasma Clean and Solder Reflow will be generated in the course of the project. The novel process technology will be made available on a first demonstration chamber. Commercialization of the Plasma Reflow technology in the Semiconductor and Microsystems industry is intended by UCP upon completion of the project.