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Forschungsstelle
EU FRP
Projektnummer
99.0660
Projekttitel
HISCORE: High speed 3D- and colour interface to the real world
Projekttitel Englisch
HISCORE: High speed 3D- and colour interface to the real world

Texte zu diesem Projekt

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Forschungsprogramme
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Kurzbeschreibung
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Partner und Internationale Organisationen
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Abstract
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Erfasste Texte


KategorieText
Schlüsselwörter
(Englisch)
3D camera; 3D image; real time; triangulation; colour coded light approach; hardware for image pre-processing; 3D face recognition; 3D gesture recognition
Alternative Projektnummern
(Englisch)
EU project number: IST-1999-10087
Forschungsprogramme
(Englisch)
EU-programme: 5. Frame Research Programme - 1.2.4 Essential technologies and infrastructures
Kurzbeschreibung
(Englisch)
See abstract
Partner und Internationale Organisationen
(Englisch)
Coordinator: Siemens (D)
Abstract
(Englisch)
Research objectives: The main objective of the project is to provide a new high speed 3D- and color image acquisition system that may be used as computer input device. Among the numerous conceivable fields of application for this system, 2 exemplary implementations, face recognition and dynamic gesture recognition will be carried out within the project.
A detailed description is available a http://www.ist-hiscore.com
Leutron Vision's task inside the HISCORE project is to develop a hardware subsystem for the real time processing of color coded images for 3D image generation and interfacing with a PC.
Results after the first project year
A first version of the PC subsystem including image acquisition from standard or digital cameras could be produced, which is suitable as compact image processing system for the free market.
Results after the second project year
The upgrade of the mainboard to run PentiumIII, which was designed in the first project year, could be finished successfully after a redesign.
A first prototype board of the data flow machine was designed and assembled. It was possible to merge the camera frontend of the digital frame grabber with the dataflow machine to the same board. The camera frontend was enhanced from the RS644 interface to the standard camera link interface.
Status:
Currently the RGB generation with BAYER PATTERN decoding and the Sobel filter are designed but not tested on the hardware platform.
Next steps:
·The VHDL code has been verified only with simulation until today, as next step it has to be verified on the hardware. Then further steps of Siemens 3D algorithms have to be coded in VHDL. Until now it is not clear how many steps of the 3D image generation can be done in hardware. Including bayer pattern decoding and sobel filter about 75% of the resources of the FPGA are used, however optimization may free up more space.
· The software userinterface has to be designed and implemented
· Reduction of heating:Two students of the University of Applied Sciences of Central Switzerland, Horw will do evaluations about thermal optimization of the system
· General system optimization (Lan speed up)
Datenbankreferenzen
(Englisch)
Swiss Database: Euro-DB of the
State Secretariat for Education and Research
Hallwylstrasse 4
CH-3003 Berne, Switzerland
Tel. +41 31 322 74 82
Swiss Project-Number: 99.0660