SATURN: SOI advanced technology for ultra rapid networks

• Forschungsstelle: EU FRP
• Projektnummer: 99.0601
• Projekttitel Englisch: SATURN: SOI advanced technology for ultra rapid networks

Schlüsselwörter (Englisch)

SOI; devices; submicron; transient effects; self heating; CMOS; semiconductors

Alternative Projektnummern (Englisch)

EU project number: IST-1999-10521

Forschungsprogramme (Englisch)

EU-programme: 5. Frame Research Programme - 1.2.4 Essential technologies and infrastructures

Kurzbeschreibung (Englisch)

See abstract

Partner und Internationale Organisationen (Englisch)

Coordinator: CEA-LETI, Grenoble (F)

Abstract (Englisch)

In this second period EPFL continued to focus on transient effects on SOI MOS devices provided by our partners LETI and IMEC. EPFL also studied the electrical performance of gate oxide dielectrics on bulk and SOI wafers. Finally EPFL proposed a new charge pumping technique that can be used on SOI devices.The transients in PD SOI MOSFETs produced with 0.25 mm and 0.1 mm technologies were studied. The exponential dependence of the switch-on transient time on the reciprocal drain voltage for both p- and n-channel devices is explained by the predominance of the impact ionisation mechanism. A pulse method to measure output I-V curves using short gate pulses has been applied to study the self-heating and transient effects in 0.1 mm SOI nMOSFETs. It is shown that under normal operating conditions the difference in the DC and pulsed I-V curves of PD SOI MOSFET is attributed mainly to the floating body effect and not to the self-heating. We demonstrated also that it is possible to use the body charging of PD SOI devices to store information. Based on this effect a 1T-DRAM cell concept was proposed for the first time. This cell is at least two times smaller in area than the conventional 1T/1C DRAM cell and does not require the integration of a storage capacitor. This concept should allow the manufacture of low cost DRAMs and eDRAMs for 100 and sub 100 nm generations.We also performed charge pumping and conductivity measurements to characterize the gate dielectric and the Si/SiO2 interface. A low interface trap density (~3*1010 [cm-2eV-1]) is measured. The quantum oscillations were observed in the Fowler-Nordheim tunnelling regime and demonstrate a good quality of the Si-SiO2 interface. It was found that the SILC behaviour is similar to that measured on bulk devices. The current - voltage dependencies of capacitors with different areas made on bulk and SOI wafers were measured. It is found that in case of bulk devices the current flows rather uniformly and the edge effects do not have a noticeable impact. In case of SOI devices the edge effects do contribute to the measured current. Constant voltage time-to-breakdown measurements were performed. In case of bulk devices hard breakdowns were usually detected but in case of SOI device a hard breakdown was usually preceded by at least one soft breakdown. The SOI capacitors show better time to breakdown values notwithstanding the fact that the Vg used in these measurements is higher for the structures on SOI.
Finally, a new method to determine the interface trap density in partially depleted SOI floating body MOSFETs is proposed for the first time. It can be considered as a 'transient' charge pumping technique in contrast to the normally used 'stationary' method. In our technique majority carriers are removed from the floating body by applying a burst of pulses to the transistor's gate. The change in the linear drain current after each pulse is used to determine the device interface trap density. The unique advantage of this method is the possibility to use it to characterize body-contact less MOSFETs. The technique proposed is simple, reliable and can be used for the characterization of deep sub micron devices.

Datenbankreferenzen (Englisch)

Swiss Database: Euro-DB of the
State Secretariat for Education and Research
Hallwylstrasse 4
CH-3003 Berne, Switzerland
Tel. [phone]
Swiss Project-Number: 99.0601