Partner und Internationale Organisationen
(Englisch)
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CSEM (CH), EPFL (CH), SGS-Thomson (F), CNET (F), University Pavia (I)
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Abstract
(Englisch)
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The general objectives of the project are to develop low power and low voltage key RF blocks for highly integrated personal communication terminals and to derive a design methodology for such RF blocks based on the used CMOS technology. This Design Experiment is aimed on advanced architecture and circuit design to allow single chip integration of the base-band and RF section in CMOS technology for 2nd and 3rd Generation Mobile and Wireless Systems using the 900MHz and 2GHz band. The main areas of application for the developed circuits are the UMTS (W-CDMA, TD-CDMA), GSM, DECT and FLEX paging standards.
By designing, building and testing functional silicon prototypes, enhanced technologies for manufacture and assembly are to be developed in the field of advanced low power CMOS circuits. The prototypes are developed in three steps, component level, block level and system level, and are designed to serve as electronic building blocks in real products in wireless and mobile communications applications. Furthermore, the technology is considered to be suitable for the design of subsystems in the market segments of consumer products, automotive and other industrial applications.
Objectives
· Development of novel models for active and passive devices as well as fine-tuning and validation based on first silicon fabricates;
· Advanced CMOS RF circuit design including blocks such as LNA, down-converter mixers & phase shifters, oscillator and frequency synthesiser, integrated filters, delta sigma conversion, power amplifier, etc.
· Analysis and specification of sophisticated architectures to meet in particular low power single chip implementation;
· Individual block design, simulation, and evaluation against silicon prototypes;
· Exhaustive system validation based on a complete prototype for a specified system;
· Functional prototypes based on applications for wireless and mobile communications.
The so-called EKV (Enz-Krummenacher-Vittoz) MOSFET model, developed at EPFL-LEG, is an analytical, scaleable and compact MOST model which is built on fundamental physical properties of the MOS transistor. Among the original concepts used in this model are the normalization of the channel current, and taking the substrate as a reference instead of the source. The basic long-channel model is formulated in symmetric terms of the source-to-bulk and drain-to-bulk voltages. In particular, the transconductance-to-current ratio is accurately described for all levels of current from weak inversion through moderate and to strong inversion. This characteristic is almost invariant with respect to process parameters and technology scaling; therefore, the model can be adjusted to a large range of different technologies. Short-channel effects have been included in the model for the simulation of submicron technologies. A full charge-based dynamic model as well as the thermal noise model are derived within the same approach. The continuity of the model characteristics is based on the use of a single equation, enhancing circuit convergence. The relative simplicity of the model and its low number of parameters also ease the process of parameter extraction, for which an original method was developed.
The role of EPFL-LEG within the CRAFT project is to enhance the EKV model with RF features obtained in VLSI CMOS technology.
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