Partner und Internationale Organisationen
(Englisch)
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Philips (NL), Combitech (S), IMEC (B), IVF (S), Siemens (D), TU Berlin (D), STP (D), Shellcase (Israel), Cicorel (CH
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Abstract
(Englisch)
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1. Project objectives
Specification of technical objectives
For ICs, passive and discrete components:
Direct chip attach of ICs holds inherent advantages over conventional packages, such as smaller form factor and better electrical performance. However the key to widespread adoption of flip chip technology in high volume lies in the reduction of cost of ownership below that of competing packaging technologies. The benchmark is given by plastic packages and complete compatibility with SMD technology shall be assured. In case the 'Know Good Die' KGB issue becomes a critical factor packaging shall be done into chip Size or Chip Scale CSP packages. These are SMT compatible packages providing the highest degree of miniaturisation.
For first lever interconnect:
First level assembly processes, fully SMD compatible, fast and low cost, are to be developed for fine pitch flip chips in combination with small other components.
For rigid, flex and MID substrates:
Direct attach of fine pitch flip chip puts high requirements on the substrate. Substantial improvements are to be achieved in accuracy of solder mask registration, surface flatness, the raison of glass transition temperature and the reduction of the via size. This all at a price that remains competitive considering the integrated cost for product realisation. The key metrics are:
· 50 µm lines and spaces.
· Six conductive layers (one on the bottom for ball attach, two signal routing layers, one power, one GND, one for component attach).
· Laser drilled vias or photo imageable vias, allowing for filled and tented vias at a grid pitch of 250 µm.
· For flexible substrates requirements comparable to those for the rigid substrates with an accuracy for the solder mask positioning of better than 20 µm.
· For MID substrates, a directly in the MID part integrated multilayer with the same features as for the rigid substrates, but only having four wiring layers.
For connection to the outer world:
The Multi Chip Modules are to be connected to either a mother board, a housing or man-machine interface. Most convenient will be the integration into a SMD compatible package, such that for second level interconnect it would be indistinguishable from other components.
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