SPOEC: Smart pixel optoelectronic connections

• Research unit: EU RFP
• Project number: 96.0108

Key words (English)

Optical interconnects; smart pixel; vcsel; optoelectronic; communication

Alternative project number (English)

EU project number: EP 22.668

Research programs (English)

EU-programme: 4. Frame Research Programme - 1.3 Telematic systems

Short description (English)

See abstract

Partners and International Organizations (English)

Herriot-Watt University, Edinburgh (UK), (Project Leader), University of Glasgow (UK), Trinity College Dublin (IRL), Supelec Paris (F), Supelec Metz (F)

Abstract (English)

As feature sizes on silicon IC's become smaller and the performance of individual chips becomes more powerful, so the problem of providing a proportional increase in external input/output capacity becomes harder. Physical limits on the numbers and bandwidth of electrical pin connections create a substantial bottleneck. The SPOEC project aimed to develop and exploit smart-pixel techniques, which provide three-dimensional optical interconnects based on multiple free-space connections distributed across the full area of the chip in array format.
The objective of the project can be summarized as follows:
Demonstration of parallel connections to Si-IC's based on assembly with III-V semiconductor optoelectronic chips containing arrays of VCSELs (Vertical Cavity Surface Emitting Lasers), detectors and modulators. The target specification is 4k optical channels (64 x 64) each operating at 250 Mbit/s. This corresponds to an aggregate i/o of 1 Tbit/s., with the VCSEL array transmitting 16 GBit/s.
The construction of the demonstrator system took place at the Herriot-Watt University in Edinburgh, Scotland. Several European partners provided individual components for the system.

Contribution of Swiss partner:
The Centre Suisse d'Electronique et de Microtechnique SA CSEM Zürich (former Paul Scherrer Institute Zurich) is one of the few European suppliers of VCSELs. Within the framework of the SPOEC project, the expertise in the design, fabrication and testing of VCSELs in the deep red (760 nm) has been applied and extended to develop a stable fabrication process for individually addressable two-dimensional top emitting 8x8 VCSEL arrays operating at 960 nm
.
According to the timetable, the main goal of the first half of the total project period was to deliver an operating 8x8 VCSEL array after month 18 with the array fulfilling certain target specifications. The initial process developement was mainly focused on a high yield of working devices and a good uniformity of characteristics across the arrays. Additionally, the high frequency modulation of individual devices was studied, which resulted in several design changes for the fabrication of faster VCSELs with low electrical parasitics. In parallel with the work on non-oxidized VCSELs, we further developed the fabrication process of oxide-confined VCSELs and eventually focused on these devices due to their intrinsic advantages with respect to efficiency and high speed modulation. Non-oxidized and oxidized VCSEL arrays were packaged with driver printed circuit boards (PCBs) and it was shown that these subsystems fulfilled all target specifications for the optical data input to the SPOEC demonstrator.

References in databases (English)

Swiss Database: Euro-DB of the
State Secretariat for Education and Research
Hallwylstrasse 4
CH-3003 Berne, Switzerland
Tel. [phone]
Swiss Project-Number: 96.0108