FETA: Flexible low power Embedded Time series signal Accelerator

Research unit

INNOSUISSE

Project number

43210.1 IP-ICT

Project title

FETA: Flexible low power Embedded Time series signal Accelerator

Texts for this project

	German	French	Italian	English
Short description		-	-
Abstract		-	-	-

Category	Text
Short description (German)	FETA: Flexible low power Embedded Time series signal Accelerator
Short description (English)	FETA: Flexible low power Embedded Time series signal Accelerator
Abstract (German)	Development of a flexible and low-power hardware accelerator for the analysis of time series signals with artificial intelligence. The main goal is to allow the deployment of machine learning locally in the sensing nodes in order to solve today#s issues linked to power consumption and privacy.