NEUral computing aRchitectures in Advanced Monolithic 3D-VLSI nano-technologies

• Unité de recherche: SEFRI
• Numéro de projet: 15.0277

Résumé des résultats (Abstract) (Anglais)

We propose to fabricate a chip implementing a neuromorphic architecture that supports state-of-the-art machine\nlearning algorithms and spike-based learning mechanisms. With respect to its physical architecture this chip will\nfeature an ultra low power, scalable and highly configurable neural architecture that will deliver a gain of a factor 50x\nin power consumption on selected applications compared to conventional digital solutions; and fabricated in Fully-\nDepleted Silicon on Insulator (FDSOI) at 28nm design rules. In parallel the project will be validating the modules to\nrealise RRAM synapses both planar and in a 3D monolithic structure.\nWe will complete this vision and develop complementary technologies that will allow to address the full spectrum\nof applications from mobile/autonomous objects to high performance computing coprocessing, by realising (1) a\ntechnology to implement on-chip learning, using native adaptive characteristics of electronic synaptic elements;\nand (2) a scalable platform to interconnect multiple neuromorphic processor chips to build large neural processing\nsystems.\nThe neuromorphic computing system will be developed jointly with advanced neural algorithms and computational\narchitectures for online adaptation, learning, and high-throughput on-line signal\nprocessing, delivering\n1. an ultra-low power massively parallel non von Neumann computing platform with non-volatile nano-scale devices\nthat support on-line learning mechanisms\n2. a programming toolbox of algorithms and data structures tailored to the specific constraints and opportunities of the\nphysical architecture;\n3. an array of fundamental application demonstrations instantiating the basic classes of signal processing tasks.\nThe neural chip will validate the concept and be a first step to develop a European technology platform addressing\nfrom ultra-low power data processing in autonomous systems (Internet of Things) to energy efficient large data\nprocessing in servers and networks.