Hardware and software implementation of new scalable and parallel symmetric cipher

• Research unit: INNOSUISSE
• Project number: 7645.1;10 NMPP-NM

Short description (English)

Hardware and software implementation of new scalable and parallel symmetric cipher

Abstract (English)

This project aims at implementing a cryptographic algorithm from Cryptonics Systems to achieve encryption in the 1-10 Gbps throughput range. The algorithm, whose design principles arise from physics instead of mathematics, is very flexible and thus perfectly suited to address material constraints of diverse hardware implementation such as FPGA, integrated circuits or GPUs. It is also parallel and scalable, thus parallel hardware is favoured to achieve best results.