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Unité de recherche
PCRD EU
Numéro de projet
02.0306
Titre du projet
HOLMS: High speed opto-electronic memory systems
Titre du projet anglais
HOLMS: High speed opto-electronic memory systems
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Mots-clé
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Autre Numéro de projet
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Programme de recherche
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Description succincte
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Résumé des résultats (Abstract)
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Texte
Mots-clé
(Anglais)
Electronics; Microelectronics; Information Processing; Information Systems; Innovation; Technology Transfer
Autre Numéro de projet
(Anglais)
EU project number: IST-2001-35235
Programme de recherche
(Anglais)
EU-programme: 5. Frame Research Programme - 1.2.4 Essential technologies and infrastructures
Description succincte
(Anglais)
See abstract
Résumé des résultats (Abstract)
(Anglais)
The project aims to make the use of board level optical interconnection in information systems practical and economical by developing opto-electronic packaging technology compatible with standard electronic assembly processes. The technology will allow seamless integration of planar free space optics, waveguides and fiber arrays into high performance electronic systems. Thus it will provide information technology systems with high chip IO, high bandwidth and low latency connections needed to solve the interconnection bottleneck.To demonstrate the potential of the technology we will address the most pressing problem of contemporary computer architecture: memory latency. We will implement a fully functional multiprocessor DPS running an industrially motivated application. The optical interconnection will reduce the memory latency of the demonstrator to the range of raw chip latency and signal propagation time.
Objectives:
1) Develop opto-electronic packaging technology that allows a seamless integration of complex, parallel opto-electronic interconnection with conventional high performance electronic systems using standard electronic assembly techniques;
2) Construct a demonstrator to prove that the above technology coupled with a system architecture specifically designed to exploit the advantages of optical interconnection can dramatically increase the performance of real life information systems. To this end we will address the key problem of contemporary computer architecture: memory latency in a system motivated by an industrial application of one of the partners.
Work description:
1) Opto-Electronic packaging technology: The proposed board level optical interconnection concept is based on the combination of two new optical transmission system: a) Planar free space optics that folds the optical paths of a complex free space interconnection within a transparent substrate; b) Waveguides integrated in conventional printed circuit boards (PCB)that provide a robust, low cost transmission across a system board. For inter board and inter cabinet transmission both the planar free space optics and the PCB integrated waveguides feature a seamless opto-mechanical interface to commercial parallel fiber arrays. A key issue that will be addressed is the integration of the above technologies with high performance electronic systems and with each other. To this end we will develop opto-electronic multichip modules (OE-MCM) that will combine planar free space optics with a high performance thin film electronic MCM substrates containing optical and opto-electronic components. The technology will be compatible in a package compatible with standard electronic assembly procedures;
2) Demonstrator: Whereas optical telecommunication systems focus on bandwidth distance product optical board and cabinet level interconnections in information technology systems need to address chip IO limits, interconnection hierarchy and most of all latency. The project will show how this can be accomplished through the combination of the above optical packaging technology with direct integration of optical IOs on CMOS circuits. The demonstrator will implement a high speed opto electronic memory (HOLMS) architecture developed by one of the partners. In the HOLMS architecture a single stage, high bandwidth low latency fanout/fanin optical links replaces the traditional high latency multistage processor memory interconnection to reduce the main memory access latency to the range of the raw chip access time and speed of light signal propagation time.
Milestones:
- Planar free space optical systems optimised for use in information systems;
- Process for the integration of planar free space optics with thin film MCM substrates in OE-MCMs including detailed characterization through simulation and and prototype evaluation;
- A process for interfacing OE MCM with waveguides integrated in conventional PCB;
- A fully working multiprocessor DSP running an industrially motivated application using the above new technologies to provide low latency memory.
Références bases de données
(Anglais)
Swiss Database: Euro-DB of the
State Secretariat for Education and Research
Hallwylstrasse 4
CH-3003 Berne, Switzerland
Tel. +41 31 322 74 82
Swiss Project-Number: 02.0306
SEFRI
- Einsteinstrasse 2 - 3003 Berne -
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