MAGIC FEAT: Meshes and global integration for semiconductor front-end simulation

• Unité de recherche: PCRD EU
• Numéro de projet: 99.0199-2
• Titre du projet anglais: MAGIC FEAT: Meshes and global integration for semiconductor front-end simulation

Mots-clé (Anglais)

Mesh generation; multi-dimensional process simulation

Autre Numéro de projet (Anglais)

EU project number: IST-1999-11433

Programme de recherche (Anglais)

EU-programme: 5. Frame Research Programme - 1.2.4 Essential technologies and infrastructures

Description succincte (Anglais)

See abstract

Autres indications (Anglais)

Full name of research-institution/enterprise:
ISE Integrated Systems Engineering AG

Partenaires et organisations internationales (Anglais)

Coordinator: FhG (D)

Résumé des résultats (Abstract) (Anglais)

Simulation programs are established means for the development of semiconductor devices in ULSI technology. Over the years, 2D simulation programs have been successfully used to support the manufacturing process and the optimisation of microelectronic devices as well as the development of new technologies. Novel technologies, however, especially in the sub-micron range, demand ever higher accuracy from the simulation programs. Likewise the transition from 2D to 3D is getting more and more important, due to the fact that certain effect can only be handled adequately in 3D.
Whereas physical models are naturally 3-dimensional, requirements in mesh generation and geometry handling are by far more complex in 3D as compared to 2D. If at all, algorithms and quality criteria successfully utilized in 2D cannot be easily transferred to 3D. Therefore mesh generation and geometry handling is still the major bottleneck in 3D process simulation.
Based on the experience of previous European projects, the goal of MAGIC_FEAT is the development of adequate mesh generators and geometry algorithms for 3D process simulation and their integration into a 3D process simulator. As a particular challenge the strong variation on the length scale should be mentioned: Layer thickness of a few nanometers have to be resolved on strongly non-planar devices of extent in the range of micrometers. Furthermore process steps such as thermal oxidation, etching and deposition lead to a change in geometry and possibly topology in time. This demands very high performance of the tools involved. Simultaneously to the development of the meshing tools physical models for the underlying processes have been improved.
A major goal of the project is the throughout 3D simulation of realistic devices. As a benchmark example a 0.18um STI MOS transistor developed by STMicroelectronics was chosen. At the beginning of the project several process steps were simulated in 2D and subsequently extruded into the third dimension. At present, after the second feedback loop of the project most of the 2D process steps have been replaced by their 3D counterparts. Integration of different volume meshers into DIOS enabled the comparison of the different tools in the case of dopant diffusion.
For the time being thermal oxidation is one of the process steps missing in order to complete the full 3D process flow. However, first 3D oxidation examples of a LOCOS structure have been simulated successfully. These promising simulations were performed using the process simulator FLOOPS which will serve as the new integration platform for future development. Within these simulations, mechanical stress that develops during thermal oxidation has been modeled in all materials including the silicon substrate. These quantities can be kept and computed during different process steps such as temperature ramps. This allows to account for the so-called full history stress computation. The ability of reading and writing files in DF-ISE format has been implemented into FLOOPS in order to communicate with different tools. This allows for instance to start a simulation of a thermal oxidation process with an initial mesh created by a mesher other than the native FLOOPS mesher. First test regarding this have been made as well.
Currently effort is being made to simulate the oxidation steps required for the benchmark examples such as the STI liner oxidation and the gate re-oxidation.

Références bases de données (Anglais)

Swiss Database: Euro-DB of the
State Secretariat for Education and Research
Hallwylstrasse 4
CH-3003 Berne, Switzerland
Tel. [phone]
Swiss Project-Number: 99.0199-2