Partners and International Organizations
(English)
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KUL (B), UCAT (I), ANCL (HU), Barco (B), STM (I), IMSE-CNM(E)
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Abstract
(English)
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DICTAM aims to develop new processor architectures, algorithms and chips to enable real-time image processing, and to apply the resulting hardware/software systems to video computing, and to the development of intelligent visual devices for hand-held visual inspection and motion scene evaluation. At a technical level, the approach to be followed relies on the use of parallel distributed processors to handle the huge amount of data associated to image flows. Conventionally, serial, accurate digital computers are used, although significant portions of the data do not require much accuracy. Consequently, they can be more efficiently processed by using analog array computers. The global technical objectives of DICTAM include:
To develop a new generation of CMOS Analogic (analog-plus-logic) Programmable Array Processors (APAPs) chips dedicated to image processing applications. These consist of 2-D arrangements of identical analog processors located on the nodes of a 2-D grid. These processors have nonlinear internal dynamics and linear interactions only with their nearest neighbours. Their interaction weights are digitally-programmable, and the chip includes a RAM memory to store codified sets of interaction patterns, a control unit to execute processing tasks with time-varying interaction patterns, and local distributed cache memories (digital and analog) for the storage of intermediate results. In addition, a local logic processor is embedded in each cell. A subclass of these processors also embeds distributed optical sensors (one per processor) for parallel image acquisition. Circuits belonging to this type are called Focal Plane Analog Programmable Array Processors (FPAPAPs).
To define and design the hardware/software environment (computing infrastructure) hosting these chips, making them interact with image acquisition devices and digital computation circuitry. A relevant feature of the resulting image supercomputers (supercomputer means more than 1012 equivalent digital operations per second) is the hybridization of APAPs, ARAMs and digital processors, as a Chip-Set. DICTAM aims to realize a smart sinergy of these types of processors based on adaptive optimum distribution of the image-processing tasks among them, depending on the specific spatio-temporal characteristics of the image sequences being processed. Because of this sinergy (analog-plus-logic), and due to the cellular structure of the core analog computing parts, these new image supercomputers (engine boards) are called Analogic Cellular Engines (ACEs).
To develop flexible and modular software algorithms to use these ACEs in the application fields of video computing and embedded intelligent visual devices.
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