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Research unit
INNOSUISSE
Project number
5311.1;6 KTS-ES
Project title
Processeur VLIW à architecture sérielle
Project status Finished
 
Start date 01.07.2001
End date 29.04.2005
 
Granted total costs 105'000.00  CHF
Section 5 CTI
Project category Project
Research type Applied research and development
NABS classification Industrial production and technology
 
Research disciplines
100 % T180 Telecommunication engineering
Last modification of the project
27.11.2014